In the race to build ever-smaller microchips, researchers have tinkered for more than a dozen years with an end-run technique that would shrink things to previously unrealizable scales. Rather than etching away semiconductors with photolithography to create circuits and processors—a top-down process that is limited by the light wavelength used—bottom-up fabrication could yield even smaller processors by stringing together nanoscale building blocks into functional devices.

After a flurry of exciting results in the late 1990s and early 2000s things quieted down a bit as the new approach hit some fundamental roadblocks. "Since that time there's not been a heck of a lot in terms of advances where people are using synthesized nanoscale components," says Charles Lieber, who leads a nanotechnology research group at Harvard University. Lieber was among the pioneers whose work earned nanoelectronic circuitry "breakthrough of the year" honors in Science magazine in 2001. But the inability of the field to progress much beyond rudimentary, one-off demonstration devices cooled some observers' enthusiasm. Due in part to a general lack of reproducibility, Lieber says, "a lot of people that I work with in the semiconductor industry have become very skeptical—and with good reason."

Lieber and his colleagues at Harvard and at the MITRE Corp. in McLean, Va., have now produced a technology that may go some way toward clearing that hurdle. The researchers designed and built relatively large arrays of nanowire transistors that act as programmable circuits, which could be strung together into tiny, low-power processors—a scalable approach that could reboot interest in bottom-up circuitry. The group described the advance in the February 10 issue of Nature. (Scientific American is part of Nature Publishing Group.)

The researchers interlaced semiconductor nanowires and metallic electrodes in a crisscrossing pattern that produced a tiny transistor at each intersection, or node. The individual nodes can be switched from being an active transistor to a passive interconnection and back again, which allowed the researchers to program 56 transistor nodes into a simple logic circuit for binary addition that they say more than triples the complexity of its bottom-up predecessors. To demonstrate the technology's flexibility, Lieber and his colleagues then reprogrammed the same circuit to perform a different logical operation. And the prototype is capable of more, with 496 configurable nodes spread between two linked arrays on a single device that the researchers call a logic tile.

Crucially, a tile programmed to form a circuit has enough voltage gain to drive a circuit on another tile, so the output from one logic tile can become the input for another. Interlocking the logic tiles would form a type of processing cascade that would vastly enhance the number-crunching capacity of such devices.

"It is indeed possible to get the level of reproducibility that we can start thinking about making pretty sophisticated circuits, and even processors," Lieber says. His MITRE colleagues are interested in tiny processors for microrobotics applications, but a number of uses for embedded sensors and other medical devices might be possible as well. Even if the logic tiles do not compete with traditional top-down processors in performance, there are some niches where compactness and low power consumption will be attractive.

Lieber says that having demonstrated the validity of the logic-tile concept, the next step is to link several tiles together to form a small-scale processor. Beyond that, the tiles would have to be scaled down considerably from their current 960 square microns to find real applications. But at the very least the advance may help to redirect research efforts to a once white-hot field. "It should renew interest in this area—it's certainly renewed my interest," Lieber says. "I really think that we can keep pushing this forward."

2 Comments

1. 1. jtdwyer 09:41 PM 2/9/11

   Since the logic tile was tested by programming it to function first as an adder, then a subtracter, multiplexer, demultiplexer and clocked D-latch circuits, I guess that emulation of a complete general purpose processor would require physically configuring hundreds of these logic tiles to produce a single large scale integrated device (at nano scales). Achieving this level of integration even for low power tiles may challenge the ability to configure reliable power circuit configurations and cooling capabilities at such small scales.
   
   This is certainly an interesting new development in fundamental capabilities at nano scales, but a great deal of development work remains to produce complete, functional general purpose processors.

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2. 2. thibber 11:13 AM 2/10/11

   Exciting article. I am curious to see how the ultimate scaling compares to traditional "top-down" technology. And after scaling, it still seems that although a "programmable circuit" would be ultimately more versatile and reproducible, there would be wasted space in the transistors programmed to be passive interconnections.
   
   Regardless, this is big news, and I can't wait to see how this technology progresses.

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